IBM has pushed semiconductor research past a symbolic frontier, unveiling what it calls the world's first sub-1-nanometer chip technology, designed at a 0.7-nanometer node.
100 billion transistors on a fingernail
The prototype crams nearly 100 billion transistors onto a piece of silicon roughly the size of a fingernail. According to IBM, the advance translates into either a 50% increase in processing power or a 70% reduction in energy consumption compared with current designs — a trade-off chipmakers can tune depending on whether they are optimizing for performance or efficiency.
Why the number matters
For decades, progress in computing has been measured by how small transistors can shrink. Breaking below one nanometer is as much a research milestone as a commercial one — these are prototypes, not products you will find in a laptop next year. But it signals that the physics roadblocks many predicted would halt Moore's Law are still being engineered around.
Why it matters
AI's appetite for compute has made energy efficiency a first-order concern, not an afterthought. A 70% cut in power draw at the transistor level could meaningfully change the economics of the data centers straining today's electrical grids. IBM's breakthrough is a reminder that even as the industry pours billions into building more, researchers are still finding ways to make each chip do more with less.
